Zerocat’s Coreboot Machines  v0.10.0
How to create Zerocat’s Coreboot Machines like the ZC-X230 and others...
Build the Coreboot ROM Image (ThinkPad T60)

Main Page | Related Pages | List of Files

Todo:
Proceed with care, Update and Review needed!
Deprecated:
This file is outdated.

Hardware

  • ThinkPad T60
    • with Intel GPU
    • Display LTN141XA-L01, not compatible with libreboot

Prepare

See Coreboot Build How-To:

https://www.coreboot.org/Build_HOWTO

Basically:

$ git clone https://review.coreboot.org/coreboot
$ cd coreboot
$ git checkout 4.6-2367-ge89d444043
$ git submodule update --init --checkout
$ make crossgcc-i386

Extract Binary Blobs

VGA Option ROM

See https://www.coreboot.org/VGA_support#RECOMMENDED:_Extracting_from_your_vendor_bios_image.
See https://github.com/bibanon/Coreboot-ThinkPads/wiki/T60p-Extract-VGABIOS.

Use bios_extract in order to extract vendor’s VGA Option ROMs from the original firmware dump. Then install fcode-utils and use romheaders to check extracted Option ROMs. "Vendor ID" and "Device ID" must match your hardware.

In example:

$ bios_extract t60-lenovo.rom
$ romheaders oprom_4.rom

Image 1:
PCI Expansion ROM Header:
  Signature: 0x55aa (Ok)
  CPU unique data: 0x80 0xe9 0xa9 0xe3 0x30 0x30 0x30 0x30
                   0x30 0x30 0x30 0x30 0x30 0x30 0x30 0x30
  Pointer to PCI Data Structure: 0x0040

PCI Data Structure:
  Signature: 0x50434952 'PCIR' (Ok)
  Vendor ID: 0x8086
  Device ID: 0x27a2
  Vital Product Data:  0x0000
  PCI Data Structure Length: 0x0018 (24 bytes)
  PCI Data Structure Revision: 0x00
  Class Code: 0x030000 (VGA Display controller)
  Image Length: 0x0080 blocks (65536 bytes)
  Revision Level of Code/Data: 0x0000
  Code Type: 0x00 (Intel x86)
  Last-Image Flag: 0x80 (last image in rom)
  Reserved: 0x0000

Platform specific data for x86 compliant option rom:
  Initialization Size: 0x80 (65536 bytes)
  Entry point for INIT function: 0xe3af
Note
In this example the vgabios extracted from firmware seems to work fine with coreboot – extraction from memory has been skipped.

Configuration

$ make menuconfig

Use default values, but additionally select/deselect as specified:

  • General Setup
    • [*] Use CMOS configuration values
  • Mainboard
    • Mainboard vendor (Lenovo) —>
    • Mainboard model (ThinkPad T60 / T60p) —>
    • ROM chip size (2048 KB (2 MB)) —>
    • (0x200000) Size of CBFS filesystem in ROM
  • Chipset
    • Include CPU microcode in CBFS (Generate from tree) —>

      Note
      Unsure, whether “Do not include microcode updates” would work with this exact model of display, which is not compatible with libreboot.
  • Devices
    • Graphics initialization (Run VGA Option ROMs) —>
    • [*] Re-run VGA Option ROMs on S3 resume
    • [*] Load Option ROMs on PCI devices
    • Option ROM execution type (Native mode) —>
    • Display —>
      • [*] Set framebuffer graphics resolution
      • framebuffer graphics resolution (1024x768 64k-color (5:6:5)) —>
      • Framebuffer mode (VESA framebuffer) —>
    • [*] Add a VGA BIOS image
    • "(oprom_4.rom)" VGA BIOS path and filename
  • Payload
    • Add a payload (An ELF executable payload) —>
    • "(payload.elf)" Payload path and filename

      Note
      File payload.elf should match your previously built executable GRUB payload file for platform i386-coreboot. See GRUB How-To.
    • [*] Use LZMA compression for payloads
Note
The .config file may contain your paths which you probably don't want to share with others.
We prefer to avoid CPU Microcode Updates on machines that are known to work well enough without (see libreboot’s documentation).
Otherwise select "Generate from tree".

Compile

When you have exit the menuconfig tool, type:

$ make

This will compile the coreboot.rom in build/, as for example:

Created CBFS (capacity = 2096856 bytes)
    CBFS       fallback/romstage
E: Input file size (74892) greater than page size (65536).
    CBFS       cpu_microcode_blob.bin
    CBFS       fallback/ramstage
    CBFS       config
    CBFS       revision
    CBFS       cmos.default
    CBFS       cmos_layout.bin
    CBFS       pci8086,27a2.rom
    CBFS       fallback/dsdt.aml
    CBFS       fallback/payload
    CBFS       coreboot.rom
    CBFSPRINT  coreboot.rom

Name                           Offset     Type           Size   Comp
cbfs master header             0x0        cbfs header        32 none
config                         0x80       raw               306 none
revision                       0x200      raw               576 none
cmos.default                   0x480      cmos_default      256 none
cmos_layout.bin                0x5c0      cmos_layout      1704 none
fallback/dsdt.aml              0xcc0      raw             12526 none
(empty)                        0x3e00     null            49496 none
fallback/romstage              0xff80     stage           53884 none
cpu_microcode_blob.bin         0x1d280    microcode       94208 none
fallback/ramstage              0x34300    stage           70560 none
pci8086,27a2.rom               0x45700    optionrom       65536 none
fallback/payload               0x55780    payload       1348521 none
(empty)                        0x19eb80   null           396504 none
bootblock                      0x1ff880   bootblock        1568 none
    HOSTCC     cbfstool/ifwitool.o
    HOSTCC     cbfstool/ifwitool (link)

Built lenovo/t60 (ThinkPad T60)

The careful reader will stumble over the error message above, as like:

Created CBFS (capacity = 2096856 bytes)
    CBFS       fallback/romstage
E: Input file size (74892) greater than page size (65536).

However, the build process won't stop, it finally succeeds.

Please read Ignore Coreboot Build Error? to see our suggested approach.

Tweak Parameters in cmos.default

Get an overview of tweakable parameters:

$ ./nvramtool -C ../../build/coreboot.rom -a

Tweak parameter gfx_uma_size and wwan in the ROM’s cmos.default file:

$ ./nvramtool -C ../../build/coreboot.rom -w gfx_uma_size=64M
$ ./nvramtool -C ../../build/coreboot.rom -w wwan=Disable

Possible values can be shown with:

$ ./nvramtool -C ../../build/coreboot.rom -e gfx_uma_size
$ ./nvramtool -C ../../build/coreboot.rom -e wwan

As a result, these are the ROM’s standard settings:

util/nvramtool$ ./nvramtool -C ../../build/coreboot.rom -a
boot_option = Fallback
reboot_counter = 0x0
debug_level = Spew
nmi = Enable
gfx_uma_size = 64M
boot_devices = ''
boot_default = 0x41
cmos_defaults_loaded = Yes
lpt = Enable
hyper_threading = Enable
touchpad = Enable
bluetooth = Enable
wwan = Disable
wlan = Enable
volume = 0x3
first_battery = Primary
trackpoint = Enable
sticky_fn = Disable
power_management_beeps = Enable
low_battery_beep = Enable

Add Custom Files

Add Zerocat’s GRUB Configuration File

Use coreboot’s cbfstool to add the custom configuration file as etc/zerocat.cfg.

$ build/cbfstool build/coreboot.rom add -t raw -n etc/zerocat.cfg -f your/path/to/grub@2.02_zerocat.cfg
$ build/cbfstool build/coreboot.rom print

See grub@2.02_zerocat.cfg for reference. Before using it, please edit the file and adjust your keyboard layout which is currently pre-set via keymap.

Add Background Image

The ZC-T60 machine comes with a special 1024x768px PNG background image. Note the module png has already been packed in section "Build GRUB", therefore you can just add you image like so:

$ ./cbfstool ../../build/coreboot.rom add -n background.png -f your/path/to/background.png -t raw
$ ./cbfstool ../../build/coreboot.rom print

See ZC-T60-Coreboot.png for reference.

Main Page | Related Pages | List of Files